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Tektronix – P6418 17 Channel Logic Probe

Tektronix – P6418 17 Channel Logic Probe

Description

Lo g i c A n a ly z e r s TLA 600 Series Features and Benefits MagniVuTM Acquisition Technology Provides 500 ps Timing Resolution on All Channels All the Time Through a Single Probe Up to 200 MHz State Acquisition with 400 MHz Data Rate Supports Advanced Processors and Buses Applications Hardware Debug and Verification Processor/Bus Debug and Verification Embedded Software Integration, Debug and Verification Embedded Real-time Software Optimization Simultaneous State and High Speed Timing Analysis Through the Same Probes Pinpoints Elusive Integration Faults Microsoft® Windows®-based PC Platform Provides Familiar User Interface With Network Connectivity BREAKTHROUGH SOLUTIONS FOR REAL-TIME DIGITAL SYSTEMS ANALYSIS Today’s digital design engineers face daily pressures to speed new products to the marketplace.

The TLA 600 Series answers the need with breakthrough solutions for the entire design team providing the ability to quickly monitor, capture and analyze realtime operation in order to debug, verify and optimize and validate mainstream digital designs. This kind of performance is matched by value. The TLA 600 Series consists of a full line of complementary support products for popular microprocessors and buses. Productivity and connectivity features such as the open Microsoft Windows platform make the TLA 600 Series easy to use and easily networked into the design environment. Flexible capabilities help you protect your current investment, as well as allow you to buy what you need today and expand to meet your needs tomorrow. ® Characteristics Logic Analyzer Acquisition STATE ACQUISITION CHARACTERISTICS  P6417,  GENERAL Maximum Synchronous Clock Rate ­ 100 MHz standard, 200 MHz optional. Maximum Data Rate (Half Channels) ­ 400 MHz, typical. Requires 200 MHz state option. State Memory Depth ­ 64 K, 256 K or 1 Mbits per channel. Setup Time Selection Range ­ From 8.5 ns before, to 7.0 ns after clock edge. Setup-and-hold Window ­ 2.0 ns typical.

Features:
  • < 0.7 pF Total Capacitive Loading Minimizes Intrusion on Circuits
  • 20 kOhm Input Resistance
  • 6.5 Vp-p Dynamic Range Supports a Broad Range of Logic Families
  • General Purpose Probing Allows Flexible Attachment to Industry Standard Connections
  • Connectorless Probing System Eliminates Need For On-board Connectors

 

Applications:
  • Hardware Debug and Verification
  • Processor/Bus Debug and Verification
  • Embedded Software Integration, Debug and Verification

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